CICC

Forums

2022 CICC Forums

The forums are special sessions of invited papers.

Monday, April 25, 2022

9:30 am-11:30 am PDT

 

Next Generation Computing

Session Chairs: Sudipto Chakraborty. IBM, USA & Shih-Chii Liu, ETH, Switzerland

 

Speakers:

 

Gert Cauwenberghs, University of California San Diego, USA

 

Bio: Gert Cauwenberghs is Professor of Bioengineering and Co-Director of the Institute for Neural Computation at UC San Diego. He received the Ph.D. in Electrical Engineering from Caltech and was previously Professor of Electrical and Computer Engineering at Johns Hopkins University, and Visiting Professor of Brain and Cognitive Science at MIT. His research focuses on neuromorphic engineering, adaptive intelligent systems, neuron-silicon and brain-machine interfaces, and micropower biomedical instrumentation. He is a Fellow of the Institute of Electrical and Electronic Engineers (IEEE) and the American Institute for Medical and Biological Engineering (AIMBE), and a Francqui Fellow of the Belgian American Educational Foundation. He served IEEE in a variety of roles including as Editor-in-Chief of the IEEE Transactions on Biomedical Circuits and Systems, and on the IEEE ISSCC program committee.

 

Title: Energy-Efficient Neuromorphic Computing-in-Memory

 

Abstract: Neuromorphic and artificially intelligent processors for cognitive computing in custom silicon and reconfigurable hardware are evolving from highly specialized, task-specific compute-in-memory neural and synaptic crossbar array architectures to large tiles of neurosynaptic cores assembled into hierarchically interconnected networks for general-purpose learning and inference. Combining efficiency of local interconnects with flexibility and sparsity in global interconnects, these assemblies are capable of realizing a wide class of deeply layered and recurrent neural architectures with embedded local plasticity for on-line learning, at a fraction of the computational and energy cost of implementation on CPU and GPGPU platforms. Adiabatic energy recycling in charge-mode crossbar arrays permit further scaling of energy efficiency, approaching that of synaptic transmission in the mammalian brain, towards green exascale computing.

 

 

Irem Boybat, IBM Zurich, Switzerland

 

Bio: Irem Boybat is a Research Staff Member at IBM Research – Zurich, Switzerland. She received her Ph.D. degree in Electrical Engineering from Ecole Polytechnique Federale de Lausanne (EPFL), Switzerland, in 2020. Previously, she had obtained an M.Sc. degree in Electrical Engineering from EPFL, Switzerland, in 2015, and a B.Sc. degree in Electronics Engineering from Sabanci University, Turkey, in 2013. Her research interests include in-memory computing for AI systems, neuromorphic computing, and emerging resistive memory. She has co-authored over 40 scientific papers in journals and conferences, received three best conference presentation/paper/poster awards and holds 5 granted patents. She was a co-recipient of the 2018 IBM Pat Goldberg Memorial Best Paper Award, 2018 IBM Research Division Award on neuromorphic computing using phase-change memory devices, and 2020 EPFL PhD Thesis Distinction in Electrical Engineering

 

Title: Phase-change memory-based analog in-memory computing for AI

 

Abstract: AI systems managed to reach and even exceed human performance in various cognitive tasks, ranging from image recognition to strategic games and to reasoning. AI models continue to grow in size and there is a significant need to adopt non-von Neumann-based paradigms to efficiently address their computational requirements. Analog in-memory computing is one such approach, where computational tasks are performed in memory by exploiting the physical attributes of memory devices. This talk will focus on phase-change memory-based in-memory computing for accelerating deep learning inference and training. System architectures tailored for various application domains will be presented and strategies to overcome the limited analog computational precision for achieving high accuracies will be discussed

 

 

Bhavin Shastri, Queen’s University, Canada

 

Bio: Prof. Bhavin J. Shastri is an Assistant Professor of Engineering Physics at Queen’s University and a Faculty Affiliate at the Vector Institute. He was an Associate Research Scholar (2016-2018) and Banting and NSERC Postdoctoral Fellow (2012-2016) at Princeton University. He received a PhD degree in electrical engineering (photonics) from McGill University in 2012. He is a co-author of the book Neuromorphic Photonics, a term he helped coin. Dr. Shastri is the recipient of the 2022 SPIE Early Career Achievement Award and winner of the 2020 IUPAP Young Scientist Prize in Optics “for his pioneering contributions to neuromorphic photonics”. He is a Senior Member of Optica and IEEE.

 

Title: Silicon photonic neural networks for computing and AI

 

Abstract: Artificial intelligence enabled by neural networks has enabled applications in many fields (e.g. medicine, finance, autonomous vehicles). Software implementations of neural networks on conventional computers are limited in speed and energy efficiency. Neuromorphic engineering aims to build processors in which hardware mimic neurons and synapses in brain for distributed and parallel processing. Neuromorphic engineering enabled by silicon photonics can offer sub nanosecond latencies, and can extend the domain of artificial intelligence and neuromorphic computing applications to machine learning acceleration (vector-matrix multiplications, inference and ultrafast training), nonlinear programming (nonlinear optimization problem and differential equation solving) and intelligent signal processing (wideband RF and fiber-optic communications). We will discuss current progress and challenges of neuromorphic photonics to scale to practical systems.

 

 

Yuya Seki, Keio University, Japan

 

Bio: Yuya Seki is a project lecturer of statistical mechanics in physics at Keio University. His work focuses on the theory of quantum and classical annealing, which are computation methods based on quantum and classical spin systems. In particular, statistical-mechanical properties of the spin systems for annealing are his research interests

 

Title: Improvement of Ising machine by non-stoquastic operators and development for quantum simulations

 

Abstract: One of the hottest topics in quantum physics is the development of calculator based on quantum mechanics. D-Wave Systems, Inc. is the world’s first company to sell a calculator using quantum effects. The calculator has been designed to perform quantum annealing (QA), which can prepare a desired quantum state by using quantum real-time dynamics. Quantum annealing covers a wide range of applications, e.g., optimization of job scheduling, optimization of base placement, capacitated vehicle routing problem, and simulation of physical systems. Since these problems can be represented by Ising model, classical Ising machines are also applicable to the problems. Improving performance of Ising/annealing machine is an important issue in this field. Also, expanding the range of applications is a challenging work. In this presentation, we start from a review of QA, and describe difficulties of QA for certain problems. We see that such problems can be solved by using a non-stoquastic operator. Non-stoquastic operators also play an important role in expanding the range of applications. We see that QA with non-stoquastic operators are applicable to certain quantum simulations. To expand the range of applications further, we introduce a method to express a cost function whose analytical form is unknow with Ising model, and show that Ising machine can optimize the cost function approximately.

 

Tuesday, April 26, 2022

8:00 am-10:30 am PDT

 

Power Management for Harsh Environments

Session Chairs: Hanh-Phuc Le, University of California San Diego, USA & Dina El-Damak, University of Science and Technology at Zewail City, Egypt

 

Speakers:

Sri Navaneeth Easwaran, Texas Instruments, USA

Bio: Dr. –Ing. Sri Navaneeth Easwaran, Senior Member IEEE, received his Bachelor’s (1998, Bharathidasan University), Master’s (2006, University Twente) degrees in Electrical Engineering and Dr. –Ing. degree from University of Erlangen-Nuremberg in 2017. He worked at SPIC Electronics, STMicroelectronics, Philips Semiconductors between 1998 and 2006. From 2006 he is with Texas Instruments (TI) where he was the design lead of airbag squib driver ICs. and System Basis Chips. He is an IET Fellow (Feb 2021), TI Senior Member Technical Staff, has 20+ granted patents and 14 publications. He has offered tutorials on automotive ICs at IEEE Conferences. Since Dec 2020, he is offering iDLP (Industrial Distinguished Lecturer Program) CASS seminars on smart automotive circuits.

Title: Smart Power ICs for Harsh Automotive Environment

 

Abstract: Power semiconductors continue to dominate the electronic content in Automotive applications. State of the Art automotive ICs integrate several power MOSFETs along with their gate drivers (including charge pumps or boost converters that supply the gate drivers) whose operating voltage range is from 5V to 60V. However, the automotive environment is very harsh demanding tolerance of these circuits to faults like short to ground, short to battery, ability to drive large range of inductive loads along with high temperature performance and advanced diagnostics in a multiple supply voltage environment. In addition, these circuits have to be designed for low Electro Magnetic Interference (EMI) and higher immunity to high frequency noise and battery transients. Overall there is additional burden for automotive IC designers when compared to any other application. In this forum we will cover some of those challenges and possible solutions that are addressed by using Smart Power ICs.

Robert Baumann, Radiosity Solutions LLC, USA

Bio: During his 29 year career at Texas Instruments (TI) Robert Baumann was focused on solving reliability challenges in DRAM, ASIC, logic, and various processor technologies with a core emphasis on the impact of particle radiation effects on reliability. In the early 90s he discovered that the nuclear reaction of 10 B with low-energy cosmic-ray neutrons was dominating failure rates in many digital electronics and developed process and packaging mitigation solutions that enabled significant industry-wide reductions in field failure rates (5x-15x). Robert co-led a Semiconductor Industry Association expert panel that convinced U.S. Government agencies that the ITAR capture criteria needed to be changed. This work led directly to major changes in 2007 that effectively eliminated the risk of inadvertent capture of commercial parts, saving the U.S. semiconductor industry billions of dollars. For the last half of his career at TI he was a chief technologist and TI Fellow focused on radiation effects and reliability in advanced logic technologies and aerospace/defense products. He retired from TI in 2018. Robert is currently providing radiation effects analyses and mitigation solutions for aerospace, medical, and semiconductor technology manufacturers through his consulting company, Radiosity Solutions. He is also guiding graduate research at Southern Methodist University focused on characterization and modeling of radiation effects in various III-V power device technologies. Robert holds a B.A. in Physics from Bowdoin College and a Ph.D. in ECE from Rice University. He is an IEEE Fellow and has coauthored 49 papers in refereed journals, 53 invited conference presentations, two book chapters, TI’s Radiation Handbook for Electronics, and was one of the main authors of the JEDEC JESD89,89A industry-standard for radiation testing. He has 17 patents.

Title: Integrated Circuit Reliability in Radiation Environments

Abstract: This talk considers two key harsh environment applications – spacecraft systems and terrestrial autonomous vehicles. We will examine the various ways things that can go wrong and the impact to the performance and operation of advanced integrated circuits exposed to the characteristic particle radiations in the low-earth orbit and terrestrial environments. We then narrow our focus to one failure mode, the single-event-latchup (SEL). SEL can occur when a single radiation event injects enough charge in CMOS circuits to turn-on parasitic bipolar transistors and create a high-current latch. SEL is a failure mode that poses a major risk for electronics in high reliability applications since even when seemingly recoverable, it can cause larger system failures and often leaves latent damage accumulation that can greatly reduce component lifetime. We close with a look at ways SEL can be reduced or eliminated via process, circuit- layout, circuit-design, and system operational modes.

 

Robert Pilawa, University of California, Berkeley, USA & Samantha Coday, University of California, Berkeley, USA

Bio:

Robert Pilawa-Podgurski is currently an Associate Professor in the Electrical Engineering and Computer Sciences Department at the University of California, Berkeley.  He received his BS, MEng, and PhD degrees from MIT, and performs research in the area of power electronics. He received the 2014 Richard M. Bass Outstanding Young Power Electronics Engineer Award of the IEEE Power Electronics Society, given annually to one individual for outstanding contributions to the field of power electronics before the age of 35.  He was the 2018 recipient of the IEEE Education Society Mac E. Van Valkenburg Award given for outstanding contributions to teaching unusually early in ones career. He currently serves on the ISSCC Power Management Subcommittee. He is co-author of eleven IEEE prize papers.

 

 

Bio: Samantha Coday is a PhD candidate at University of California, Berkeley, advised by Dr. Robert Pilawa. Samantha received her Bachelor’s degree in Electrical Engineering and Mathematics, in 2017, from Southern Methodist University. She then completed her Masters in 2019, at UC Berkeley. Her current research interests are in the design of light-weight multilevel switched capacitor power converters with applications in aerospace. Samantha has been selected as a 2021 EECS Rising Star, a Cadence Women in Technology Scholarship winner and an Outstanding Graduate Student Instructor.

Title: Power converter design in hostile environments – flying, shaking, freezing, and radiated

Abstract: This talk will highlight the challenges and opportunities in the design, fabrication, and operation of light-weight power converters for aerospace applications, with specific applications in electric aircraft, and space applications. In addition to the more common challenges associated with vibration, shock, and high temperatures, these types of converter are also exposed to extreme low temperatures, and to radiation effects that severely limits the available semiconductor devices. We will showcase how new and innovative circuit topologies enable the use of low-voltage GaN power semiconductors in high-voltage applications, thereby dramatically reducing the size and weight compared to conventional designs. Component selection, flight-testing procedures, and practical challenges associated with these designs will be presented.

 

Goutam Chattopadhyay, NASA Jet Propulsion Laboratory (JPL), USA

Bio: Goutam Chattopadhyay is a Senior Scientist at the NASA’s Jet Propulsion Laboratory, California Institute of Technology, a Visiting Professor at the Division of Physics, Mathematics, and Astronomy at the California Institute of Technology, Pasadena, USA, a BEL Distinguished Visiting Chair Professor at the Indian Institute of Science, Bangalore, India, and an Adjunct Professor at the Indian Institute of Technology, Kharagpur, India. He received the Ph.D. degree in electrical engineering from the California Institute of Technology (Caltech), Pasadena, in 2000. He is a Fellow of IEEE (USA) and IETE (India) and an IEEE Distinguished Lecturer. His research interests include microwave, millimeter-wave, and terahertz receiver systems and radars, and development of space instruments for the search for life beyond Earth. He has more than 350 publications in international journals and conferences and holds more than twenty patents. He also received more than 35 NASA technical achievement and new technology invention awards. He received the IEEE Region-6 Engineer of the Year Award in 2018, Distinguished Alumni Award from the Indian Institute of Engineering Science and Technology (IIEST), India in 2017. He was the recipient of the best journal paper award in 2020 and 2013 by IEEE Transactions on Terahertz Science and Technology, best paper award for antenna design and applications at the European Antennas and Propagation conference (EuCAP) in 2017, and IETE Prof. S. N. Mitra Memorial Award in 2014.

Title: “Are We Alone? NASA Technologies to Find Life Beyond Earth and Answers to Other Science Questions”

Abstract: NASA’s Jet Propulsion Laboratory, which completed eighty years of its existence in 2016, builds instruments for NASA missions. Exploring the universe and our own planet Earth from space has been the mission of NASA. Robotics missions such as Voyager, which continues to go beyond our solar system, missions to Mars and other planets, exploring the stars and galaxies for astrophysics missions, exploring and answering the question, “are we alone in this universe?” has been the driving force for NASA scientists for more than six decades. Fundamental science questions drives the selection of NASA missions. We develop instruments to make measurements that can answer those science questions. In this presentation, we will present an overview of the state of the art instruments that we are currently developing and layout the details of the science questions they will try to answer. Rapid progress on multiple fronts, such as commercial software for component and device modeling, low-loss circuits and interconnect technologies, cell phone technologies, and submicron scale lithographic techniques are making it possible for us to design and develop smart, low-power yet very powerful instruments that can even fit in a SmallSat or CubeSat. We will also discuss the challenges of the future generation instruments in addressing the needs for critical

 

Wednesday, April 27, 2022

9:00 am-11:30 am

 

Smart Imaging

Session Chairs: Ping-Hsuan Hsieh, National Tsing Hua University, Taiwan & Jerald Yoo, National University of Singapore, Singapore

 

Speakers:

David Stoppa, Sony, Italy

 

Bio: David Stoppa (SM’12-M’97) received the Laurea degree in Electronics Engineering from Politecnico of Milan, Italy, in 1998, and the Ph.D. degree in Microelectronics from the University of Trento, Italy, in 2002. Since 2021 he is the head of Sony Europe Technology Development Centre, Italy, working on the research and development of next generation image sensors architectures, technologies, and systems. From 2017 to 2021 he has been with AMS-OSRAM leading a team developing range-sensors and imagers products. Before that, he has been the head of the Integrated Radiation and Image Sensors research unit at FBK where he has been working as a research scientist since. He is serving as Associate Editor for IEEE Journal of Solid-State Circuits since 2017.

Title: Time-of-Flight depth sensing and imaging: design challenges, evolution and emerging trends

 

Abstract: In the past few years depth-sensing and 3D imaging systems have become more and more a fundamental auxiliary component to conventional digital cameras, not only in the context of industrial applications, but also in consumers and automotive markets. Among all known depth sensing technologies, Direct-Time-of-Flight technique based on Single-Photon-Avalanche-Diodes is the one where there has been a real revolution, mainly pivoting on the development of wafer-level-stacked technologies and the improvement in back-side-illuminated SPADs. This talk will review some of the most recent sensors and systems from the state-of-the-art, focusing on the key circuital building blocks and System-on-Chip architectures, addressing the main design challenges, and discussing emerging trends in this fascinating field.

Chih-Cheng Hsieh, National Tsing-Hua University, Taiwan

Bio: Chih-Cheng Hsieh (M’08) received the B.S., M.S., and Ph.D. degrees from the Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan, in 1990, 1991, and 1997, respectively. From 1999 to 2007, he was with an IC design house, the Pixart Imaging Inc., Taiwan. He led the Mixed-Mode IC department as a Senior Manager and involved in the development of CMOS image sensor ICs for PC, consumer, and mobile phone applications. In 2007, he joined the Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan, where he is currently a Full Professor. His current research interests include low-voltage low-power smart CMOS image sensor IC, ADC, and mixed-mode IC development for artificial intelligence (AI), internet of things (IoT), biomedical, space, robot, and customized applications. Dr. Hsieh is serving as the TPC member of ISSCC, A-SSCC, and the Associate Editor of IEEE Solid-State Circuit Letters (SSC-L) and IEEE Circuits and Systems Magazine (CASM). He was the SSCS Taipei Chapter Chair and Student Branch Counselor of NTHU, Taiwan.

 

Title: Intelligent vision chip using mixed-mode processing-in-sensor technique and tiny machine-learning model

Abstract: The image-based processing using neural network (NN) are widely developed in the diversified AI-aided applications. Processing-in-sensor (PIS) technique can effectively reduce the power and latency of the massing data transfer and computation in NN model by extracting the meaningful data and processing from the very frontend – sensing node. For smart edge applications, the intelligent vision chip using PIS with in-sensor/near-sensor feature extraction is a promising solution.

 

Edoardo Charbon, Swiss Federal Institute of Technology, Switzerland

Bio: Edoardo Charbon (SM’00 F’17) received the Diploma from ETH Zurich, the M.S. from the University of California at San Diego, and the Ph.D. from the University of California at Berkeley in 1988, 1991, and 1995, respectively, all in electrical engineering and EECS. He has consulted with numerous organizations, including Bosch, X-Fab, Texas Instruments, Maxim, Sony, Agilent, and the Carlyle Group. He was with Cadence Design Systems from 1995 to 2000, where he was the Architect of the company’s initiative on information hiding for intellectual property protection. In 2000, he joined Canesta Inc., as the Chief Architect, where he led the development of wireless 3-D CMOS image sensors. Since 2002 he has been a member of the faculty of EPFL, where is a full professor. From 2008 to 2016 he was with Delft University of Technology’s as Chair of VLSI design. Dr. Charbon has been the driving force behind the creation of deep-submicron CMOS SPAD technology, which is mass-produced since 2015 and is present in telemeters, proximity sensors, and medical diagnostics tools. His interests span from 3-D vision, LiDAR, FLIM, FCS, NIROT to super-resolution microscopy, time-resolved Raman spectroscopy, and cryo-CMOS circuits and systems for quantum computing. He has authored or co-authored over 400 papers and two books, and he holds 23 patents. Dr. Charbon is a distinguished visiting scholar of the W. M. Keck Institute for Space at Caltech, a fellow of the Kavli Institute of Nanoscience Delft, a distinguished lecturer of the IEEE Photonics Society, and a fellow of the IEEE.

Title: How can massively parallel, three-dimensional photon counting reshape image sensing

Abstract: Photon counting has entered the realm of image sensing with the creation of deep-submicron CMOS SPAD technology. The format of SPAD image sensors has expanded from 8×4 pixels of our first LIDAR in 2004 to our recent megapixel camera in 2019, and the applications have literally exploded in the last few years, with the introduction of proximity sensing and portable telemeters. SPAD image sensors are today in almost every smartphone and will soon be in every car. The introduction of Quanta Burst Photography has created a great opportunity for SPAD technology, which is ideally suited for it, given its digital nature and speed; it is however computationally intensive. A solution to this problem is the use of 3D stacking, introduced for SPADs in 2015, where large silicon real estate is now available to host deep-learning processors, neural networks directly on chip, thus enabling complex processing in situ and reducing the overall power consumption. Another recent trend has been the use of SPADs in qubit readout and control, thus making SPADs amenable to interface with quantum processors, due to SPAD capability of operating at cryogenic temperatures. The talk will conclude with a technical and economic perspective on SPAD imagers and the vision for massively parallel solid-state photon counting in scientific and consumer applications.

 

 

Piero Malcovati, University of Pavia, Italy

Bio: Piero Malcovati received the Master degree in Electronic Engineering from University of Pavia, Italy in 1991. In 1992 he joined the Physical Electronics Laboratory (PEL) at the Federal Institute of Technology in Zurich (ETH Zurich), Switzerland, as a Ph. D. candidate. He received the Ph. D. degree in Electrical Engineering from ETH Zurich in 1996. From 1996 to 2001 he has been Assistant Professor and from 2002 to 2017 Associate Professor at the Department of Electrical Engineering (now Department of Electrical, Computer, and Biomedical Engineering) of the University of Pavia. From 2017 Piero Malcovati is Full Professor in the same institution. His research activities are focused on microsensor interface circuits, high-performance data converters, and integrated power management circuits. He authored and co-authored more than 100 papers in International Journals, 300 presentations at International Conferences, 30 book chapters, and 19 patents. He is co-recipient of the ESSCIRC 2007 best paper award, of the ESSCIRC 2015 best student paper award, and of the CICC 2020 best paper award. He served as Technical Program Chairman of PRIME 2006, ICECS 2009, PRIME 2013, and ESSCIRC/ESSDERC 2022. He was or still is member of the Technical Program Committees of several International Conferences, including ISSCC, ESSCIRC, SENSORS, ICECS, DATE, and PRIME. He is Associate Editor of the IEEE Journal of Solid-State Circuits, Editor in Chief of the Journal of Circuits, Systems, and Computers, and Deputy Editor in Chief of the Journal of Analog Integrated Circuits and Signal Processing. He is an IEEE senior member.

Title: X and γ Ray Detectors for Imaging and Spectroscopy in Space Missions

 

Abstract: X/γ imaging and spectroscopy is one of the core technologies for most of the upcoming space missions, aiming to challenging scientific goals, such as investigating the origin of Universe or studying gravitational waves and γ-ray bursts, as well as to monitor the Earth surface. All of these applications require wide-area X/γ ray detectors, which have to be read-out by dedicated ASICs. Besides the development of the detectors, which is challenging by definition, the implementation of spectroscopy-grade mixed analog/digital ASICs, which include on a single chip the low-noise front-end circuits, the A/D converters (ADCs), and complex digital circuits is extremely difficult, because of stringent constraints in the area and power consumption budget available for each channel. Moreover, interferences and crosstalk among channels and between the analog and the digital sections of the ASIC are serious issues, since the signals to be processed are extremely weak (as low as few hundreds of electrons) and the resolution requirements are quite demanding (down to few electrons). The integration of all the required circuits in a single ASIC, however, is extremely beneficial, since size, weight, and power consumption of the complete instruments can be strongly reduced, which is particularly important on spacecrafts. This lecture reviews the state-of-the-art of X/γ imaging and spectroscopy detectors for space applications and illustrates the latest developments in the design of the read-out ASICs, using actual examples to illustrate challenges, solutions, and perfromance.

 

Ehsan Afshari, University of Michigan, USA

Bio: Prof. Afshari received his Ph.D. EE from Caltech in 2006 and joined the ECE department of Cornell University. Ten years later, he joined the EECS department of the university of Michigan, Ann Arbor. His team is engaged in the theoretical foundations, design and experimental validation of analog, RF, mm-wave, and THz integrated devices, circuits and systems for a variety of applications including communications, imaging, and sensing. His work is funded by federal agencies such NSF, DARPA, ONR, and ARL as well as industry such as Intel, TI, Raytheon, and Qualcomm. He has been the recipient of several awards and honors, including a 2008 DARPA Young Faculty Award, a 2010 NSF CAREER Award, a first place at Stanford-Berkeley-Caltech Innovation Challenge in 2005, and several best paper awards at the leading conferences in his field. He has also served as a Distinguished Lecturer for the IEEE Solid-State Circuits Society. He is selected as one of 50 most distinguished alumni of Sharif University. His doctoral students have also received several prestigious awards and fellowships, including the 2018, 2017, 2012, 2011, and 2010 Solid-State Circuit Society Predoctoral Achievement Award, 2011, 2013, and 2017 IEEE MTT-S Microwave Engineering Graduate Fellowships, Cornell Best Ph.D. Thesis Award in 2011 and 2014, as well as many best paper awards. The Ph.D. graduates of his group are the leaders of the field including faculty members at MIT, UC Davis, UC Irvine, Penn State University, and University of Minnesota, and companies such as IBM, Bell Labs, Qualcomm and Broadcom.

 

Title: Superman Vision: Fully Integrated Terahertz Imaging Radar in CMOS

 

Abstract: The increasing demands for compact, low-cost, and high-resolution imaging radar systems have pushed the operation frequency to the terahertz range due to the shorter wavelength and larger available bandwidth. These radars can be used in security screening, industrial quality control and biological hydration sensing applications. In this talk, we review basics of imaging radar systems as well as recent advances in this area.

 

Wednesday, April 27, 2022

9:00 am-11:30 am PDT

 

IC for Sustainability 

Session Chairs: Elnaz Ansari, Facebook, USA & Armin Tajalli, University of Utah, USA

 

Speakers:

 

Ana Arias, University of California, Berkeley, USA

 

Bio: Dr. Ana Claudia Arias is a Professor at the Electrical Engineering and Computer Sciences Department at the University of California in Berkeley and a faculty director at the Berkeley Wireless Research Center (BWRC). Prior to joining the University of California she was the Manager of the Printed Electronic Devices Area and a Member of Research Staff at PARC, a Xerox Company, Palo Alto, CA. She went to PARC from Plastic Logic in Cambridge, UK where she led the semiconductor group. She received her PhD in Physics from the University of Cambridge, UK. Prior to that, she received her master and bachelor degrees in Physics from the Federal University of Paran in Curitiba, Brazil. Her research focuses on devices based on solution processed materials and application development for flexible sensors and electronic systems. Dr. Arias is a co-founder of InkSpace Imaging, a startup company that aims to commercialized flexible MRI coils for pediatric patients.

Title: Tracking nitrogen in soil with printed chemical sensors

 

Abstract: The US National Academies of Sciences, Engineering, and Medicine recently identified the “nitrogen problem” as one of the greatest challenges to human health in the 21st century (NAS 2021). The increasing emissions of nitrogen gases is among the most serious concerns of the nitrogen problem. Nitrous oxide (N2O) emissions currently account for approximately 7% of the U.S. greenhouse gas inventory in CO2 equivalents, but unlike patterns for CO2, N2O emissions are increasing over time (EPA 2021). Plant-available nitrogen, often in the form of nitrate, is an essential nutrient for plant growth, but excessive nitrate in the environment and watershed has harmful impacts on both human health and natural ecosystems. Current nitrate measurements techniques, in both soil and water quality monitoring, involve taking samples from the environment or field to a lab, where they can be analyzed with chromatography or spectrographic methods. Such measurements are highly accurate, but they are also expensive and labor-intensive, and give data for only one point in time and space. A distributed network of nitrate sensors could better quantify and monitor nitrogen in agriculture and the environment. Here, I will discuss a printed solid-state potentiometric nitrate sensor. This sensor consists of a working electrode and reference electrode, which are printed on flexible substrates and functionalized with polymeric membranes. The potential voltage difference between the working and reference electrode is a function of the logarithm of the nitrate concentration. Printing, which encompasses a range of solution-based processing techniques, enables simple large-scale manufacturing. This means that a large number of nitrate sensors could be distributed throughout a field site to map nitrate concentrations in time and space.

Doug Carmean, Meta, USA

Bio: Doug Carmean is a Research Scientist with Meta’s Reality Labs Research group. He was an architect at Intel for 25 years where he created the vision and led the team that created the Intel Xeon Phi family of processors. At Microsoft, Doug helped scale the quantum research group into a full product development effort, co-founded an effort to use DNA for archival storage and led the initial architecture team that is developing custom silicon for the datacenter.

Title: HW/SW Ecosystems for a Sustainable Planet

Abstract: As cloud service providers race to build more datacenters to feed the world’s insatiable desire for computing, the planet is on fire, and we are under the threat of destroying the only known habitat for humans in the universe. Nearly all the large corporations have taken very aggressive goals to be carbon neutral by 2030. The drive to a green grid with renewable energy sources is an important component of a holistic plan to dramatically reduce the carbon footprint of our computing ecosystem. In addition, we need a comprehensive framework that will allow us to measure, architect, design and build electronics that will minimize our carbon footprint. This talk will provide a background on the problem and provide a direction for new tools that will allow architects and designers to consider sustainability from the early concept phase of a product.

 

Andrew Byrnes, Micron, USA

Bio: Before joining Micron in 2019 to help build and scale their new venture capital team, Micron Ventures, Andy only ever worked in startups and mostly in sustainability: as a developer of utility scale wind and solar projects; as a researcher in new solar and battery technologies; and as an investor in startups leveraging enterprise/industrial data to create a more sustainable future.

Title: End-to-End Design for Semiconductor Sustainability, a Quest

Abstract: Could we as an industry be doing more to reduce the environmental impact of semiconductor production and their usage? In this talk I’ll explore this concept from the lens of design principals and sustainability optimizations – not architecture – and share how early explorations with industry partners are defining a path for collaboration and success.

 

Carole-Jean Wu, Meta, USA

Bio: Carole-Jean Wu is currently a Research Scientist at Meta AI. Her research sits at the intersection of computer architecture and machine learning with particular emphasis on developing energy- and memory-efficient systems, optimizing systems for machine learning execution at-scale, and designing learning-based approaches for system design and optimization. She is passionate about pathfinding and tackling system challenges to enable efficient, responsible AI execution. Carole-Jean chairs the MLPerf Recommendation Benchmark Advisory Board, co-chaired MLPerf Inference, and serves on the MLCommons Board as a Director. Carole-Jean is also a tenured Associate Professor at ASU. She receives her M.A. and Ph.D. from Princeton and B.Sc. from Cornell. She is the recipient of the NSF CAREER Award, Distinction of Honorable Mention of the CRA Anita Borg Early Career Award, the IEEE Young Engineer of the Year Award, the Science Foundation Arizona Bisgrove Early Career Scholarship, and the Intel PhD Fellowship. Her research has been recognized with several awards, including IEEE Micro Top Picks and IEEE/ACM Best Paper Awards.

Title: Scaling AI Computing Sustainably: Environmental Implications, Challenges and Opportunities

Abstract: The past decade has witnessed orders-of-magnitude increase in the amount of compute for AI. Modern natural language processing models are fueled with over trillion parameters while the memory needs of neural recommendation and ranking models have grown from hundreds of gigabytes to the terabyte scale. We will explore the environmental implications of the super-linear growth trend for AI from a holistic perspective, spanning data, algorithms, and system hardware. I will talk about the carbon footprint of AI computing by examining the model development cycle across industry-scale use cases and, at the same time, considering the life cycle of system hardware. The talk will capture the operational and manufacturing carbon footprint of AI computing. Based on the industry experience and lessons learned, I will share key challenges across the many dimensions of AI and what and how at-scale optimization can help reduce the overall carbon footprint of AI and computing. This talk will conclude with important development and research directions to advance the field of AI in an environmentally-responsible and sustainable manner.

Ramin Farjadrad, Eliyan Corp., USA

Bio: Ramin is the founder and CEO of Eliyan, a technology company revolutionizing the next generation chiplet-based system-in-package (SiP) solutions. He was previously the CTO & VP of Networking/Automotive PHYs at Marvell, in charge of developing connectivity technologies for Autonomous vehicles, Hyperscale data centers, and Heterogenous SiP Integration. Ramin joined Marvell as part of acquisition of his company, Aquantia that he founded in 2005 focused on Ethernet PHY technologies. Ramin has pioneered a number of signaling schemes adopted as international Standards, such as PAM4 SerDes (IEEE 802.3cd), Multi-Gig Automotive Ethernet (IEEE 802.3ch), Enterprise Ethernet (IEEE 802.3bz), as well as a Die-to-Die connectivity scheme (BoW) at OCP. He’s the author of over 100 granted/pending patents. He has received his M.Sc./Ph.D. in EECS from Stanford University

Title: From SoCs to Chiplet-Based SiPs

Abstract: This presentation covers the current state of chiplet-based system-in-package (SiP) and architectures to address the challenges of the semiconductor industry has been facing in recent years to keep up with the Moore’s law as well as the high cost of IC development and manufacturing. The talk will also discuss some of the latest technologies and solutions in this domain more efficiently at lower cost and power.