IEEE CICC 2023 Call for Papers
Regular Paper Submission Deadline EXTENDED: November 28, 2022
2023 IEEE Custom Integrated Circuits Conference (CICC)
sponsored by the IEEE Solid-State Circuits Society and technically co-sponsored by the IEEE Electron Devices Society
April 23 – 26, 2023 – San Antonio, Texas
Submission of original unpublished work in the following areas:
Analog Circuits and Techniques: Circuits with analog-dominated innovation, building blocks such as amplifiers, comparators, frequency generation (oscillators and PLL) and clocking circuits, dividers, filters, references, nonlinear signal processing circuits, digitally-assisted
analog circuits, sensor interface circuits, analog circuits in ultra-scaled lithographies.
Data Converters including Nyquist and oversampled A/D, D/A, time- to-digital, frequency-to-digital, and analog-to-information converters of all types driven by new techniques, architectures, technologies or applications.
Digital Circuits, SoCs, and Systems for papers with IC prototypes in technologies that enhance the efficiency, performance, reliability or security of integrated systems. Areas of interest include, but are not limited to, processors, accelerators, interconnect fabrics, memory and foundational hardware design building blocks with associated tools, techniques, and methodologies in advanced nodes. Circuit and architecture co-design for domain-specific applications such as AI, cloud computing, autonomous transportation, low-temperature computing, quantum computing circuits, genome sequencing, sensing, edge computing, and communication are also of interest.
Emerging Technologies, Systems, and Applications with hardware- focused papers in the technologies of tomorrow extending from a new device to system integration and applications with a focus on, but not limited to:
- Next-generation technology and sensors including devices, integration, and packaging including nano-primitives, non-silicon-based technology, and advanced assembly. Sensor interfaces for MEMS, mm-wave/THz, flexible, printed, large-area and organic electronics, electronic-photonic co-design, and silicon photonics. Emerging computing paradigms including photonic and quantum computing hardware, and AL/ML utilizing new devices, analog, and mixed-signal circuits.
• Biomedical circuits, systems, and applications including neural interfaces, microarrays, lab-on-a-chip, bio-inspired circuits, implantable and/or wearable systems, closed-loop systems with sensing and actuation, medical imaging, and other biosensors including biomedical signal processing SoCs, AI/Machine-Learning for mixed-signal/sensing.
Foundation of System Design with research topics that show innovations in system and platform design, which extend beyond a single integrated circuit. The platforms may include 2.5D/3D chiplet based system-in-package, system-on-interposer, and multi-die integrations which benefit from ASIC integration with FPGAs, neuromorphic accelerators, quantum computers, and RISC / general- purpose compute systems. The submission may focus on systems to applications design, that may include categories (but are not limited to) such as IoT, biomedical and healthcare, machine learning, big data management, and autonomous systems, robotics, secure manufacturing, datacenter platforms, domain-specific compute, and advanced connectivity platforms.
Power Management circuits and design techniques for papers on switched-mode integrated converters using inductive, capacitive, and hybrid architectures, energy harvesting circuits, wireless power transfer, power management circuits for automotive applications, linear regulators, control and management circuits, circuit techniques with novel wide-bandgap devices and drivers, and other methods to improve system overall efficiency and performance.
Wireless Transceivers and RF/mm-Wave Circuits and Systems for low-power, energy-efficient and high performance wireless links, biomedical and sensing networks, IoT applications, cellular connectivity including M2M applications (LTE-M, NB-IoT), emerging broadband and MIMO networks (5G, WLAN), vehicle-to-vehicle (V2V), millimeter-wave
& THz systems (radar, sensing and imaging, 6G communication), frequency synthesis and LO generation, from block level (PA, LNA, VCO etc.) to full transceivers.
Wireline and Optical Communication Circuits and Systems in areas including serial and parallel links for intra-chip and chip-to-chip interconnections, memory and graphics interfaces, backplanes, long- haul, power line communications, 2.5/3D interconnect and chiplet based solutions including packaging; novel I/O circuits and signaling methods, clocking techniques including PLLs and CDRs; components such as equalizers, ADC/DAC/DSP-based transceivers, silicon photonics and optical interface circuitry for pluggable and co-packaged
Conference Technical Sessions and Events
Technical Sessions addressing a broad range of circuits, applications, design techniques, tools, test, reliability, and emerging technologies, and providing education on new, state-of-the-art developments is the core of the CICC technical program.
Educational Sessions instructed by recognized invited speakers who are among the best in the industry are included in the conference. They are valuable opportunities to refresh key skills in traditional circuit- design methods and acquire knowledge in vital new areas in analog, digital, and RF integrated circuit design.
Panels, Forums and a Plenary Session provide a platform for leaders from industry and academia to present highlights on new research and development related to circuit design and to debate key issues and controversial topics. CICC panels are well known for their lively and thought-provoking discussion and audience participation.
Our Welcome Reception and Conference Luncheon provide additional opportunities for discussion and peer networking.
Technical Session Papers are 2 pages in length. Papers should be camera-ready and submitted electronically in PDF format using the CICC website (www.ieee-cicc.org). Blind review will be adopted this year. Please follow the instructions given at the submission website to submit a blind version for review and a complete version for publication. Appropriate company and government clearances MUST be obtained prior to submission. Papers must report an original unpublished work and concisely explain how the state-of- the-art is advanced, including results. Circuit-design papers must include measured experimental results that substantiate performance
claims. Deadline for paper submission is 11:59 pm Central Time on November 28, 2022. Authors of accepted papers will be notified by email by January 13, 2023. Top-rated papers will be invited to special issues in the IEEE Journal of Solid-State Circuits and IEEE Solid- State Circuits Letters.
For more information, please visit www.ieee-cicc.org.
Sam Palermo, Texas A&M University: firstname.lastname@example.org
Arijit Raychowdhury, Georgia Institute of Technology:
Technical Program Chairs
Eric Soenen, Silicon Labs: email@example.com
Nan Sun, Tsinghua University: firstname.lastname@example.org