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SUBMISSION OF PAPERS: DEADLINE has been extended to April 9, 2008 PST

Click here for a PDF of the complete Call for Papers.

Click on the Author Kit button on the left to get information on preparing and submitting your paper. Access to online paper submission is on the Author Kit page.

Papers in the Following Areas are Requested:

Analog Circuit Design:
Amplifiers, voltage references and regulators,opamps, sample-and-hold circuits, continuous and discrete-time filters, oversampled and Nyquist-rate data converters, non-linear analog circuits, mixed analog/digital IC applications, analog circuits for sensor interfaces, low-voltage/low-power analog, and deep submicron issues in analog design.

Biomedical, Sensors, Displays, and MEMS:
Emerging technologies for sensors, displays, MEMS, and biomedical applications including materials, and methodologies. Examples include nanotechnology, microchemical sensors, biosensors and devices, image sensors, OLED’s, DNA microarrays, carbon nanotubes, micro- and nanofluidic chips, novel display technologies and plastic circuitry. Alternative techniques for energy scavenging using photovoltaic and electrochemical sources.

Digital and Mixed Signal SOC/ASIC/SIP:
Solutions to today’s complex digital and mixed-signal design problems, in particular practical examples and case studies involved with system level design using SoC/ASICs/SiPs (“how we did it”). Digitizing analog functions that are difficult to design as technology processes scale. Interfacing analog and digital in the same chip including testing. Issues with large digital designs including power management, clocking and what to do when synthesis breaks. Examples of using SIP for a system solution.

Embedded Memory:
Memory circuits, architectures, and methodologies addressing scalability, GHz performance, manufacturability, reliability, and the advancement of emerging memory technologies. Also of interest are redundancy, BIST, SER, cell stability, and low voltage/leakage design.

Manufacturing:
Special focus on challenges of and alternatives to CMOS scaling, Design for Manufacturability, cost-effective manufacturing techniques, design impact of process-technology selection or packaging. Advanced manufacturing techniques using any combination of bulk/SOI CMOS, bipolar, non-silicon, and optoelectronics technologies. Evolving chip packaging such as chip stacking, lead-free, flip-chip, and System-in-Package. Tutorial papers are encouraged.

Power Management:
Analog and digital circuit design for limiting integrated circuit power dissipation and power management. Circuits and architectures to limit active and standby power dissipation in digital circuits and memories. Advanced low power AC/DC, DC/DC converters, regulators, regulator control, and IO circuits. Integrated circuits implementing energy scavenging and power harvesting techniques. Systems implementing wireless power transmission, e.g., biomedical implants.

Programmable Devices:
Logic block, routing fabric, system architecture, and circuit design for FPGAs, PLDs, and structured arrays. Programmable I/O structures, configurable cores, interaction between configurable logic and processors/memories/fixed-function cores. Programmable analog architectures. CAD tools targeting these devices. Power efficient architecture, power modeling and optimization for programmable devices. Architecture and CAD for nano-scale FPGAs.

Simulation and Modeling:
Compact active and passive device models, behavioral modeling, and signal integrity modeling and simulation. Parasitic extraction and reduction. Simulation techniques for analog, RF, and mixed-signal circuits. Package modeling. Process variation, statistical, and reliability modeling. Compact models for extreme environment operation. SOI and multiple gate device modeling.

Test, Characterization, Debug, and Reliability:
Design for test/manufacturability/reliability, built-in-self-test for IC system and low cost test techniques, design for at speed test, RF characterization and production test, jitter characterization and manufacturing test for high speed SerDes, hardware and firmware IC debug and diagnosis, new reliability and failure mechanisms in nanometer technologies, ESD protection, latch-up and soft errors. Tutorial papers in the areas of debug and diagnosis, and high speed serial I/O testing are encouraged.

Wired Communications:
Circuits and systems for electrical and optical networks, including; peripheral IO buses, LAN, WAN, Ethernet, SONET, xDSL, SATA, HDMI, PCIe, USB, cable modems, power-line/phone-line home networks, serial links, backplane, high-speed memory and graphic interfaces, chip-to-chip interconnects, clocking and high-speed low-power blocks for broadband applications. Circuit blocks including Gbps-ESD, Serializers/Deserializers, Equalizers, PLLs, DLLs, CDRs, Oscillators, Drivers and Amplifiers.

Wireless Designs:
Integrated wireless transceiver architectures and sub-circuits for cellular, connectivity, broadband and millimeter-wave communication, low-power and biomedical, smart antennas and MIMO, software-defined radio. Papers on RF circuit solutions targeting emerging wireless applications and techniques are particularly encouraged.

Submission of Papers: Deadline is April 9, 2008

Papers must report original and previously unpublished work, including specific results. Papers may be up to 4 pages in length including illustrations, charts, tables and references. Successful submissions concisely explain how the work advances the state of the art and include schematics, measured results, and technical detail sufficient to be understood. Circuit-design papers intended for traditional lecture presentation must include measured experimental results that substantiate performance claims. Circuit-design papers using only simulation to substantiate performance claims are usually rejected for traditional lecture presentation, but may be considered for poster presentation. Papers are submitted electronically by PDF files. Authors are requested to use the IEEE PDF eXpress program to distill their files in order to meet IEEE Explore requirements. Click on the "Author Kit" button to the left and carefully read and follow the instructions on submtting a paper.

When submitting a paper, please indicate a preference for a lecture presentation or a poster presentation. CICC reserves the right to assign a paper to either category.

Appropriate company and government clearances MUST be obtained prior to submission.

Notification of the committee's decision will be emailed to authors by June 6, 2008.

CICC is devoted to showcasing original and previously unpublished technical work. By submitting a paper to CICC, the author agrees that the paper will not be placed in the public domain before the conference. In addition, the content of the paper is not, and will not be, concurrently under consideration for acceptance by another conference. The CICC Technical Committee from time to time monitors submissions to relevant conferences and will reject any paper that is submitted to another conference.

ACCEPTED PAPERS WILL BE PRINTED IN THE PROCEEDINGS WITHOUT OPPORTUNITY FOR FURTHER CHANGE.

Accepted papers will be used for publicity purposes and portions of these papers may be quoted in pre-conference magazine articles and also via the Web. If this is not acceptable, authors must email CICC at cicc@his.com to decline publicity.

Lecture Presentation Papers:
Lecture presentation papers should report original and previously unpublished work, including specific results. Successful submissions consicely explain how the work advances the state of the art and includes schematics, measured results, and technical detail sufficient to be understood. Circuit-design papers intended for lecture presentation must include measured experimental results that substantiate performance claims. Circuit design papers using only simulation to substantiate performance claims are usually rejected for traditional lecture presentations, but may be considered for poster presentation.

Poster Session Papers:
Poster presentations encourage in-depth discussions with the audience and are ideal for the presentation of ongoing research. The acceptance criteria for papers for poster presentation are identical to those for traditional lecture presentation except that the requirement for measured experiemtnal results may be relaxed.

The submission website is accessed on the Author Kit page. Click here to go to the Author Kit for complete procedures for submitting a paper as well as access to the online submission program.

The deadline for submission of camera-ready papers is April 9, 2008. Your completed submission must be downloaded by 11:59 pm Pacific time on April 9, 2008.


Click here for a PDF of the Call for Papers.

 

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