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SUBMISSION OF PAPERS: The DEADLINE for submission of papers is
April 18, 2011, 11:59 pm PST.

Please forward questions regarding submission to Aurangzeb Khan(akkhan8@gmail.com).

Click here for the Call for Papers. Online paper submission will open in mid-March.

Papers in the Following Areas are Requested:

Analog Circuit Design:
Data Converters – Nyquist and oversampled, mixed signal analog/digital applications, analog sensor processing applications, low voltage and low power analog, deep submicron issues in analog design. Blocks for analog systems – amplifiers, sample-holds, voltage references and regulators, filters continuous and discrete, non linear analog blocks, novel clock generation.

Systems on Chip and 3D:
Innovative SoC, ASIC and 3D designs, methodologies and infrastructure, including high performance and/or energy efficient architecture, implementation and assembly techniques.

Memory:
Circuits and architectures addressing power-performance-density trade-offs, Vmin, resilient design (e.g., for example, redundancy, ECC), endurance, data retention, variations tolerant design, low-leakage and reliability for volatile, non-volatile and emerging memory technologies including, but not limited to, SRAM, (e)DRAM, CAM, ROM, OTP, MRAM, RRAM, PCM and application specific memory design..

Biomedical, Actuators, MEMS, and Sensors:
Advanced ICs for biomedical, aerospace, automotive, energy, environment, and security applications. Interface circuits for emerging technologies in medicine, actuators, MEMS, and sensors are of particular interest. Examples include biosensors and devices, nanotechnology, microchemical sensors, image sensors, OLED’s, DNA microarrays, micro- and nanofluidic chips, novel display technologies and organic circuitry.

IC Manufacturing:
Special focus on challenges of and alternatives to CMOS scaling, Design for Manufacturability, specialty manufacturing techniques, and design / technology interaction. Advanced manufacturing techniques using any combination of bulk/SOI CMOS, bipolar, non-silicon, and photonic technologies. Evolving chip packaging such as chip stacking, lead-free, flip-chip, and System-in-Package. Tutorial papers are encouraged.

Power Management:
Circuit and system architectures for power management and power consumption optimization. Advanced circuit topologies and innovations in switching / linear regulators, leakage management, energy scavenging, wireless power transmission, battery charging and metering, digital control, dynamic power control, and other topical areas related to the challenges of efficient power generation, distribution, and utilization.

Simulation and Modeling:
Compact models for active and passive devices, mixed discipline and behavioral modeling, signal-integrity modeling and simulation. System and circuit simulation, parasitic extraction and reduction, simulation techniques for analog, RF, and mixed-signal circuits, package modeling, process variation, statistical, and reliability modeling, compact models for extreme environment operation, SOI and multiple gate device modeling, novel design tools.

Test, Debug, and Reliability:
Debug techniques. DFT (design for test) for analog/mixed signal circuits, equalizers, CDR, and high speed I/O. Design techniques for high reliability applications. Reliability concerns in leading edge technologies, such as soft errors. Innovations in ESD protection. Issues of testability and constraints due to protection of intellectual property or system security.

Wired Communications:
Circuits and systems for electrical and optical networks, including: peripheral I/O buses, Ethernet, SONET, SATA, HDMI, PCIe, USB, serial links, backplane, high-speed memory and graphics interfaces, intra-chip and chip-to-chip interconnects, clocking and high-speed low-power blocks for broadband applications; circuit blocks including serializers, deserializers, equalizers, PLLs, DLLs, CDRs, oscillators and integrated photonic transceivers; solutions for variability.

Wireless Designs:
Integrated wireless transceiver architectures and sub-circuits for cellular, connectivity, broadband and low-power communication, millimeter-waves, and beyond, biomedical, smart antennas, MIMO, RF MEMS, software-defined and cognitive radio. Papers on RF circuit solutions targeting emerging wireless applications and techniques are particularly encouraged.

Submission of Papers: Deadline is April 18, 2011

Papers must report original and previously unpublished work, including specific results. Papers may be up to 4 pages in length including illustrations, charts, tables and references. Successful submissions concisely explain how the work advances the state of the art and include schematics, measured results, and technical detail sufficient to be understood. Circuit-design papers intended for traditional lecture presentation must include measured experimental results that substantiate performance claims. Circuit-design papers using only simulation to substantiate performance claims are usually rejected for traditional lecture presentation, but may be considered for poster presentation. Papers are submitted electronically by PDF files. Authors are requested to use the IEEE PDF eXpress program to distill their files in order to meet IEEE Explore requirements. Click on the "Author Kit" button to the left and carefully read and follow the instructions on submtting a paper.

When submitting a paper, please indicate a preference for a lecture presentation or a poster presentation. CICC reserves the right to assign a paper to either category.

Appropriate company and government clearances MUST be obtained prior to submission. AUTHORS MUST SUBMIT THE SIGNED COPYRIGHT FORM WHEN THEY SUBMIT THEIR PAPER FOR REVIEW. PAPERS SUBMITTED WITHOUT A SIGNED COPYRIGHT FORM WILL BE DISQUALIFIED AND NOT BE REVIEWED.

Notification of the committee's decision will be emailed to authors by June 24, 2011.

CICC is devoted to showcasing original and previously unpublished technical work. By submitting a paper to CICC, the author agrees that the paper will not be placed in the public domain before the conference. In addition, the content of the paper is not, and will not be, concurrently under consideration for acceptance by another conference. The CICC Technical Committee from time to time monitors submissions to relevant conferences and will reject any paper that is submitted to another conference.

ACCEPTED PAPERS WILL BE PRINTED IN THE PROCEEDINGS WITHOUT OPPORTUNITY FOR FURTHER CHANGE.

Accepted papers will be used for publicity purposes and portions of these papers may be quoted in pre-conference magazine articles and also via the Web. If this is not acceptable, authors must email CICC at cicc@his.com to decline publicity.

Lecture Presentation Papers:
Lecture presentation papers should report original and previously unpublished work, including specific results. Successful submissions consicely explain how the work advances the state of the art and includes schematics, measured results, and technical detail sufficient to be understood. Circuit-design papers intended for lecture presentation must include measured experimental results that substantiate performance claims. Circuit design papers using only simulation to substantiate performance claims are usually rejected for traditional lecture presentations, but may be considered for poster presentation.

Poster Session Papers:
Poster presentations encourage in-depth discussions with the audience and are ideal for the presentation of ongoing research. The acceptance criteria for papers for poster presentation are identical to those for traditional lecture presentation except that the requirement for measured experiemtnal results may be relaxed.

The submission website is accessed on the Author Kit page. Click here to go to the Author Kit for complete procedures for submitting a paper as well as access to the online submission program.

The deadline for submission of camera-ready papers is April 18, 2011. Your completed submission must be downloaded by 11:59 pm Pacific time on April 18, 2011.


 

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