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Session 13 - Sensors and Imaging
Chairman: Tadahiro Kuroda
Co-Chairman: John Wright
Real-world interfaces present significant design challenges. This
session explores sensor and display interfaces.
2:00pm - Introduction
13.1 - 2:05pm
A 402-Output TFT-LCD Driver IC with Power-Controlling Function by
Selecting Number of Colors
T. Itakura, H. Minamizaki, T. Saito and T. Kuroda, Toshiba Corporation,
Kawasaki, Japan
Abstract :
A 402-output TFT-LCD driver IC with power-controlling function by
selecting number of colors to be displayed is realized by turning on and
off reference voltage buffers used in DACs. The analog section consumes
529 uA, 182 uA, 112 uA for 262,144 colors, 4,096 colors, 512 colors,
respectively.
13.2 - 2:30pm
A 500-dpi Cellular-Logic Processing Array for Fingerprint-Image
Enhancement and Verification
K. Fujii, M. Nakanishi, S. Shigematsu, H. Morimura, T. Hatano, N.
Ikeda, T. Shimamura, Y. Okazaki and H. Kyuragi, NTT Laboratories,
Kanagawa, Japan
Abstract :
A 500-dpi cellular-logic processing array performs all fingerprint
identification steps on one chip. Cellular-logic morphological functions
for the pixel-parallel processing are implemented in a 30 x 50-um2
processing unit. A single-cycle datapath and a shared logic structure
achieve compactness. A fabricated chip of 224 x 256-pixel demonstrates
fully-functional image processing and practical accuracy of
identification.
13.3 - 2:55pm
High Dynamic Range CMOS Image Sensor with Conditional Reset
S.-H. Yang and K.-R. Cho, Chungbuk National University, Chungbuk, Korea
Abstract :
In this paper, we proposed a new image pixel structure for high dynamic
range operation, which is based on a multiple sampling scheme and the
conditional reset circuits. To expand the dynamic range of the sensor,
the output of the pixel is sampled multiple times in an integration
time. In each sampling, the output of the pixel is compared with a
reference voltage, and the result of this comparison activates the
conditional reset circuit. The times of conditional reset during the
integration will contribute to the increase of the dynamic range of the
sensor. Dynamic range can be increased to N, where N is the sampling
times in an integration time. The test chip was fabricated with 0.65-um
CMOS technology (2-P, 2-M).
13.4 - 3:20pm
SOI Hall Effect Sensor Operating up to 270°C
L. Portmann, H. Ballan* and M. Declercq, Swiss Federal Institute of
Technology, Lausanne, Switzerland and *Eurmicros GmbH, Lausanne,
Switzerland
Abstract :
The design of a 5 Volts fully integrated magnetic sensor able to operate
up to 270°C is presented. Fabricated in a partially depleted 1
micron SOI process, this monolithic sensor comprises a resistive Hall
plate, an amplifier stage and an A/D converter delivering a temperature
stabilized 8 bit digital readout of the magnetic field. This circuit
uses analog techniques for continuous compensation of temperature.
Design issues inherent to partially depleted SOI, as well as constraints
due to high temperature are discussed.
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Session 14 - Enhancement Techniques for Integrated Passives
Chairman: Jean-Baptiste Begueret
Co-Chairman: Trudy Stetzler
Non-ideal behavior and parasitic effects of passive integrated
components, especially inductors, are often a limiting factor in RF
design. This session discusses several techniques and advanced models
to address these problems.
2:00pm - Introduction
14.1 - 2:05pm
On-Chip RF Spiral Inductors and Bandpass Filters Using Active Magnetic
Energy Recovery
Y.-C. Wu and M.F. Chang, University of California, Los Angeles, CA
Abstract :
Transformer-type spiral inductors and BPF are realized in 0.18um CMOS
with active magnetic energy recovery. The tested inductors show Q~3000
in 1.5-2.1GHz. The tested BPF shows 120MHz 3dB bandwidth at 1.75GHz with
3.1 dB in-band gain and 30dB rejection below 1.2GHz. This approach
complies with standard IC technologies and shows potential for low noise
and high linearity.
14.2 - 2:30pm
A 0.18um CMOS, High Q-Enhanced Bandpass Filter with Direct Digital
Tuning
C. DeVries and R. Mason, Carleton University, Ottawa, ON, Canada
Abstract :
A Q-enhanced filter is presented which operates at a high Q and employs
sub-sampling and direct digital tuning. The filter is suitable as an IF
filter in applications such as Bluetooth or GPS. The filter operates
from 1.2V-1.8V and consumes 1.08 mW at 500MHz with a SFDR of 37 dB and
a Q of 650, at 1.5V.
14.3 - 2:55pm
A 2.1GHz 1.3V 5mW Programmable Q-Enhancement LC Bandpass Biquad in
0.35um CMOS
F. Dulger, E. Sanchez-Sinencio and J. Silva-Martinez, Texas A&M
University, College Station, TX
Abstract :
A 2.1GHz, 1.3V, 5mW, fully-integrated Q-enhancement LC programmable (Q,
peak gain and fo) Bandpass Biquad is implemented in 0.35um standard
CMOS. The filter provides 1dB compression DR of 38dB and SFDR of 33dB
for a Q of 40 at 2.19GHz. The frequency tuning is 13% around 2.1GHz. The
silicon area is 0.1mm2.
14.4 - 3:20pm
A 2GHz Quadrature Hybrid Implemented in CMOS Technology
R. Frye, S. Kapur and R. Melville, Agere Systems, Murray Hill, NJ
Abstract :
We have derived a lumped-element circuit from its coupled line
counterpart for a 90°, 3dB hybrid coupler. We discuss the uses,
design, and characteristics of such circuits in CMOS technology. We show
measured characteristics of an example 50ohm, 2GHz coupler with 65dB of
image rejection, 18dB of directivity and a 4.7dB noise figure.
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