CICC 2000 Ed Sessions: Session 4

Wireless IC Design

Moderator: Trudy Stetzler, Texas Instruments
Assistant: Venu Gopinathan, Lucent Technologies, Bell Labs

E4-1 - 8:00-9:50

RF System Design
Peter Kinget, Broadcom

The growth of wireless services and applications into a consumer commodity increases the need for low-cost solutions for wireless transceivers; modern services rely on digital signal processing and control. These developments are fueling the recent surge in research and development of new wireless transceiver solutions. In this lecture wireless transceiver system design issues - old and new - are covered. First we will highlight the wireless digital communications system-level issues that set the typical design specifications for transceivers. Then the physical and technological limitations of radio signal processing are reviewed. With this background material we then proceed to the architecture design of wireless tranceivers and review the classical and modern solutions for reception and transmission. These concepts are illustrated with examples of transceiver designs from various manufacturers.

E4-2 - 10:10-12:00

Design of Front-end Circuits for Wireless
Ranjit Gharpurey, Texas Instruments

Front-end circuits in a wireless receiver play a critical role in deciding the dynamic range and performance of the entire receiver. Typical front-end circuit tasks include signal amplification and frequency translation. Issues relevant to circuits that perform these tasks will be addressed in this talk. Design metrics to quantify circuit performance and the impact of device properties such as noise and non-linearity on circuit performance will be studied. Examples of popular circuit topologies will be reviewed. The influence of parasitics such as substrate and package impedance on circuit design will also be addressed.

E4-3 - 1:00-2:50

PLLs and Frequency Synthesizers
Thomas Lee, Stanford University

RF design by itself is considered a specialty, so adding feedback to the mix only compounds the difficulty. This tutorial therefore begins with a short review of feedback principles relevant to the design of phase-locked loops. The focus is on developing key insights that help us to understand the relationships among stability, spectral purity, loop bandwidth and tuning agility in various PLL-based synthesizers.

The second part of the tutorial examines several frequency synthesizer architectures, including integer-N, fractional-N and delta-sigma types. Direct-digital synthesis techniques are also discussed. A key goal throughout is to develop an appreciation of the design tradeoffs associated with each of these synthesis approaches.

E4-4 - 3:10-5:00

RF CMOS Devices and Circuits
Tajinder Manku, University of Waterloo

Designing good RF CMOS circuits within the GHz range requires one to have a fairly good understanding of MOS devices at these frequencies. In this short course, the design of critical RF components within a CMOS environment will be reviewed. In the first part of the lecture, the various RF parameters are reviewed (noise parameters, IP3, blocking, network properties, etc.). Next, the basic physics of CMOS devices are reviewed. Topics that will be covered are linearity, small signal parameters, and noise. This will lead to describing a small and large signal model of CMOS devices at GHz frequencies. Examples of various RF circuits including LNA=s and up/down conversion mixers will be presented. Designing for noise matching, power matching, gain, and linearity will be addressed.