CICC 2000 Ed Sessions: Session 3

Broadband Communications: Architecture and IC Development

Moderator: Dawn Fitzgerald, Motorola
Assistant: Fang Lu, Broadcom Corporation

E3-1 - 8:00-9:50

Modem Fundamentals
John Kesterson, Absolute Integrated Systems Developers

The trend for insertion of telephony and wireless communications services and applications directly into consumer products continues to increase the need for low cost DSP solutions for modulation and demodulation functions within custom integrated circuits. These developments have caused exponential growth in the exposure of the custom integrated chip designer to DSP architectures and algorithms, as well as to A/D and D/A converter design and their requirements. The purpose of this lecture is to familiarize the designer with the overall transceiver design issues demonstrating the applicability and benefit of the DSP solutions. DSP functions for typical modem requirements such as timing and carrier tracking loops, FIRs, data modulators and demodulators will be discussed. Problems and challenges of the DSP approach such as quantizing noise and sample aliasing will be discussed. Finally, digital hardware design issues such as memory and processing capability requirements will be discussed.

E3-2 - 10:10-12:00 Signal Processing Considerations for Transceiver Systems
Steve Levy, TDK Semiconductor Corporation

The circuitry for communication systems is moving to higher levels of integration. Most transceivers are being implemented as single mixed-signal integrated circuits. In this presentation we will cover the requirements and limitations for analog front ends and the options available for the implementation of the transceiver channel. Sigma-delta and pipeline A/D converters will be discussed with appropriate tradeoffs in terms of power, die area, sample rate, bandwidth and resolution. System architectures and various methods of implementation, mostly digital and a hybrid approach (analog and digital signal processing), will be examined. The discussion will tradeoff power, complexity, and die size. By way of an example, the blocks and concepts discussed will be used to contrast the construction of a transceiver for the gigabit-over-copper standard and a competing standard proposal.

E3-3 - 1:00-2:50

ADSL Arch and IC design - ASIC perspective
Damien Macq, Alcatel

This lecture presents ADSL technology, from a system and architecture perspective to some detailed implementation issues. After a brief review of the problems associated with high-rate data transfer on twisted pairs, it will explain the principles of DMT modulation. It will then present the basic building blocks of an ADSL-DMT modem, and their possible implementation. Emphasis will be put on the analog part of the system, including A/D and D/A converters, continuous time filters and line drivers, with some analysis of examples from the literature. It will be concluded by some comments about ADSL chip-set partitioning and possible roadmaps.

E3-4 - 3:10-5:00

Cable Modem: System, Architecture and Circuits
Jonathan Min, Broadcom Corporation

This tutorial provides an overview of cable modem technology in three parts:

1) System issues including protocol, features, channel impairments, and PHY issues such as modulation techniques;

2) Cable modem architectures for Subscriber and Headend covering all four corners of the transmission system - upstream TDMA transmitter, upstream burst receiver, downstream QAM transmitter, and downstream QAM receiver. Other topics include hardware/software partitioning and analog/digital partitioning issues, and system simulation methodology;

3) The last part of this session will cover the block details (circuits) including QAM modulator, QAM demodulator, filters, equalizers, FEC, and synchronization blocks.