CICC 1999 Ed Sessions: E-4 - Wireless IC Design

Moderator: Venu Gopinathan, Lucent Technologies, Bell Labs
Assistant: Trudy Stetzler, Texas Instruments

E4.1: RF System Design

Peter Kinget, Lucent Technologies, Bell Labs

8:00am - 9:50am

The growth of wireless services and applications into a consumer commodity increases the need for low cost solutions for wireless transceivers; modern services rely on digital signal processing and control. These developments are fueling the recent surge in research and development of new wireless transceiver solutions. In this lecture wireless transceiver system design issues - old and new - are covered. First we will highlight the wireless digital communications system level issues that set the typical design specifications for transceivers. Then the physical and technological limitations of radio signal processing are reviewed. With this background material we then proceed to the architecture design of wireless transceivers and review the classical and modern solutions for reception and transmission. These concepts are illustrated with examples of transceiver designs from various manufacturers.

E4.2: The Design of Front-end Circuits for Wireless Applications

Ranjit Gharpurey, Texas Instruments

10:10am - 12:00pm

Front-end circuits in a wireless receiver play a critical role in deciding the dynamic range and performance of the entire receiver. Typical front-end circuit-tasks include signal amplification and frequency translation. Issues relevant to circuits that perform these tasks will be addressed in this talk. Design metrics to quantify circuit performance and the impact of device properties such as noise and non-linearity on circuit performance will be studied. Examples of popular circuit topologies will be reviewed. The influence of parasitics such as substrate and package impedance on circuit design will also be addressed.

E4.3: Phase Locked Loops for Frequency Synthesizers

Mihai Banu, Lucent Technologies, Bell Labs

1:00pm - 2:50pm

In the first part of the lecture we will review the PLL fundamental operation. We will introduce the system components: VCO, phase detector, and loop filter, and will explain the operation of the loop using classical linear system theory. The concepts of PLL type, PLL order, phase transfer function, steady-state error, tracking, and PLL noise will be introduced. The limitations of practical phase detectors and the severe consequences in terms of locking difficulties will also be discussed. In the second part of the lecture, we will analyze the application of PLLs to frequency synthesizers.

E4.4: High-Performance Frequency Synthesizer Design

Behzad Razavi, University of California, Los Angeles

3:10pm - 5:00pm

This presentation will deal with the design of frequency synthesizers for wireless applications. Following a review of basic concepts, we describe synthesizer architectures, including integer-N, fractional-N, and dual-loop topologies. Next, we present sigma-delta and direct-digital techniques and summarize issues related to monolithic integration of RF synthesizers in mainstream VLSI technologies. Finally, we study examples of the design of building blocks as well as complete synthesizers.