CICC 1999 Ed Sessions: E-2 - Selected Topics in System-on-a-Chip

Moderator: Henry Chang, Cadence Design Systems
Assistant: Mossaddeq Mahmood, Synplicity Inc.

E2.1: System-on-a-Chip: A Wireless Perspective

Syed Aon Mujtaba, Lucent Technologies, Bell Labs

8:00am - 9:50am

The last decade has witnessed a revolution in wireless communications, fueled primarily by advances in semiconductor technology, thus allowing miniaturization of form and integration of functionality. Due to this trend, the early analog-based systems of the 80's migrated to 2nd generation digital systems, leading to enhanced system capacity, better voice quality, and secure communications. It is anticipated that 3rd generation systems would be fully "multimedia-ready", allowing subscribers to browse the internet at speeds of 2Mbps and higher, at anytime, from anywhere. Considering the complexity of such systems, it is a forgone conclusion that a cost-effective solution would entail significantly higher levels of integration than currently found today.

The purpose of this tutorial is to highlight the issues and challenges associated with implementing 3G Wireless Systems in Silicon, taking into consideration both the RF portion and the Baseband section. To this end, we will start with a systems description of 2G systems (such as GSM and IS-136), and examine the various implementation methodologies adopted to date. We then delve into 3G systems, comparing and contrasting the various proposals submitted to the ITU. We then explore the various possibilities for implementation, and evaluate their respective feasibility.

E2.2: Embedded RAM Design and Application

Betty Prince, Memory Strategies International

10:10am - 12:00pm

This seminar covers systems problems solved by embedded RAM and considers the types of applications most efficiently integrated. Technical challenges and benefits from integration are detailed focusing on design considerations including design strategies, tools including cell and block compilers, and the foundry model. The cost and benefits of various alternatives to integration are discussed. Examples of innovative embedded RAM design are given by an analysis of the features and technology of embedded RAM chips from various manufacturers.

E2.3: System On a Chip Testing

Dean Adams, IBM

1:00pm - 2:50pm

Designers, test engineers, and managers each need to have an appreciation of both design and test issues associated with assembling complex chips. This lecture provides an overview of traditional and state-of-the-art techniques for testing these chips. External automated test equipment (applying patterns through the pins) has significant limitations in testing each of the on-chip cores. The use of built-in self-test circuitry can aid both memory and logic in being evaluated properly using small portions of on-chip area. The evaluation of test techniques for various types of logic, memory (including embedded SRAM, DRAM, and others), and analog circuits will be reviewed. Practical implementation of test methods will be emphasized.

E2.4: Embedded Software Methodologies

Richard Swan, Cadence Design Systems

3:10pm - 5:00pm

"Silicon without software is just sand!" provides the rallying cry for software issues to be given prominence as early as possible within the system design cycle. Embedded software is a craft that potentially uses all the techniques from both computer science and engineering. This talk will cover at a high level, selected methodologies and strategies that can assist and simplify the development and ongoing support of embedded software. Issues considered include analyzing embedded software requirements and minimizing the system design impact of real time requirements. A particular focus will be on System-on-a-Chip (SOC) hardware-software co-development. System architecture can profoundly help or hinder software development. Planning for system debug and hardware changes can substantially reduce development efforts.